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Siamak Mohammadi

Assistant Professor
Phone.Number: 61114935
Email: smohamadi [AT]

Siamak Mohammadi received his BSc, MSc and PhD degrees from the University of Paris Sud Orsay, France in 1990, 1992 and 1996, respectively, all in electrical engineering. During his PhD he was supported by
a grant from the Ministry of Education of France. From 1997 to 1999 he was a Research Associate with the Department of Computer Science, University of Manchester, England. In 1999 he moved to Canada and worked at Cogency Semiconductor Inc. in Toronto until 2003 and then at ATI Technologies Inc. until 2005. Currently he is an Assistant Professor in School of Electrical and Computer engineering, at the University of Tehran, Iran. He has over 15 years experience in VLSI digital area, ASIC design and verification, asynchronous design, and on-chip interconnects in GALS NoCs. He has contributed to the design of the first asynchronous ARM microprocessor, as well as several PowerLine networking and RFID chips.


Ph.D.: 1996, Electrical Engineering, University of Paris Sud, Orsay, France
M.Sc.: 1992, Electrical Engineering, University of Paris Sud, Orsay, France
B.Sc.: 1990, Electrical Engineering, University of Paris Sud , Orsay, France

Research Interests

Functional and Formal Verification
Asynchronous Circuits Design
Integrated System Design
VLSI Design


Design Validation of HDL Models
Asynchronous Design
Hardware Software Codesign
Introduction to computing systems

Selected Publications

1) M.H Neishaburi, M. Daneshtalab, M. Nabi, S. Mohammadi, "Coverage Directed Test Generation at Transaction Level Modeling", AICCSA, IEEE Press, Amman, Jordan, May 2007, pp. 500-505.

2) M.H Neishaburi, M. R. Kakoee, M.Daneshtalab, S. Mohammadi, "Novel Approach for System Level Voltage Scheduling Technique", ICEE, Tehran, Iran, May 2007.

3) M. Daneshtalab, A. Afzali-Kusha, S. Mohammadi, "Distributing Congestions in NoCs through a Dynamic Routing Algorithm based on Input and Output Selections", in Proceedings of 20th VLSID, IEEE Press, India, Jan 2007, pp. 546-550.

4) M. Riazati, S. Mohammadi, Z. Navabi, "Non-overlapping Set of Efficient Assertions", in Proceedings of 24th Norchip, IEEE Press, Linkoping, Sweden, Nov. 2006, pp. 201-204.

5) M. Riazati, S. Mohammadi, A. Afzali-Kusha, Z. Navabi, "Improved Assertion Lifetime via Assertion-Based Testing Methodology", in 18th International Conference on Microelectronics, ICM 2006, IEEE Press, Saudi Arabia, 16-19 Dec. 2006, pp. 48 - 51

6) M. Riazati, S. Mohammadi, Z. Navabi, "Assertion Efficiency Assessment Method", in 7th Workshop on RTL and High Level Tesiting, Fukuoka, Japan, Nov. 23-24, 2006, pp 107-110

7) M. Daneshtalab, A. Afzali-Kusha, S. Mohammadi, O. Fatemi, "Minimizing Hot Spots in NoCs through a Dynamic Routing Algorithm based on Input and Output Selections", in Proceedings of 8th SOC, IEEE Press,Tampere, Finland, Nov 2006, pp. 1-4.

8) Siamak Mohammadi, Steve Furber and Jim Garside, "Designing robust asynchronous circuit components", IEE Proc. – Circuits, Devices and Systems, Vol. 150, No3, June 2003, pp. 161-166

9) Siamak Mohammadi, Francis Devos et al., "Current-sensing device for completion detection", International Journal of Electronics, volume 85, number 3, 1998, pp. 337-344

10) J. Garside, W. Bainbridge, A. Bardsley, D. Clark, D. Edwards, S. Furber, J. Liu, D. Lloyd, S. Mohammadi, J. Pepper, O. Petlin, S. Temple, J. Woods, "AMULET3i – an Asynchronous System-on-Chip", Proceedings Async 2000, pp. 162-175, IEEE Computer Society Press, April 2000

11) Siamak Mohammadi, Didier Dulac, Alain M?©rigot, "A new massivelly parallel architecture relying on asynchronous communications", 2nd Euromicro Workshop on parallel and distributed processing, IEEE Computer Society Press, Malaga, Spain, 26-28 January 1994, pp. 58-63

12) M. Daneshtalab, A. Pedram, A. Afzali-Kusha, S. Mohammadi, "A New Fair Dynamic Routing Algorithm for Avoiding Hot Spots in NoCs", in Proceedings of ISCIT, IEEE Press, Bangkok, Thailand, Oct 2006, pp. 237-241.